Technion – Israel Institute of Technology
In a nutshell
My current research is focused on circuits and architectures with emerging memory technologies and design of energy efficient architectures. I am interested in circuit design and computer architecture, particularly within the context of artificial intelligence and neuromorphic computing.
Neuromorphic computing, VLSI, computer architecture, electronic circuits
Senior member IEEE
IEEE Israel Circuits and Systems chair
Associate Editor Microelectronics Journal, Elsevier
Associate Professor of Electrical Engineering
Shahar Kvatinsky is an Associate Professor at the Andrew and Erna Viterbi Faculty of Electrical and Computer Engineering, Technion – Israel Institute of Technology. Shahar received the B.Sc. degree in Computer Engineering and Applied Physics and an MBA degree in 2009 and 2010, respectively, both from the Hebrew University of Jerusalem, and the Ph.D. degree in Electrical Engineering from the Technion – Israel Institute of Technology in 2014. From 2006 to 2009, he worked as a circuit designer at Intel. From 2014 and 2015, he was a post-doctoral research fellow at Stanford University. Kvatinsky is a member of the Israel Young Academy. He is the head of the Architecture and Circuits Research Center at the Technion, chair of the IEEE Circuits and Systems in Israel, and an editor of Microelectronics Journal and Array.Kvatinsky has been the recipient of numerous awards: 2021 Norman Seiden Prize for Academic Excellence, 2020 MDPI Electronics Young Investigator Award, 2019 Wolf Foundation’s Krill Prize for Excellence in Scientific Research, 2015 IEEE Guillemin-Cauer Best Paper Award, 2015 Best Paper of Computer Architecture Letters, Viterbi Fellowship, Jacobs Fellowship, ERC starting grant, the 2017 Pazy Memorial Award, the 2014, 2017 and 2021 Hershel Rich Technion Innovation Awards, 2013 Sanford Kaplan Prize for Creative Management in High Tech, 2010 Benin prize, and seven Technion excellence teaching awards. His current research is focused on circuits and architectures with emerging memory technologies and design of energy efficient architectures.
- H. Abo Hana, L. Danial, S. Kvatinsky, and R. Daniel, “Cytomorphic Electronics with Memristors for Modeling Fundamental Genetic Circuits,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 14, No. 3, pp. 386-401, June 2020.
- H. Abo Hanna, L. Danial, S. Kvatinsky, and R. Daniel, “Modeling Biochemical Reactions and Gene Networks with Memristors,” Proceeding of the IEEE Symposium on Biological Circuits and Systems, pp. 1-4, October 2017.
- H. Abo Hanna, L. Danial, S. Kvatinsky, and R. Daniel, “Memristors as Artificial Biochemical Reactions in Cytomorphic Systems,” Proceedings of the IEEE International Conference on Science of Electrical Engineering, December 2018.
- D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, “Memristor-based Multilayer Neural Networks with Online Gradient Descent Training,” IEEE Transactions on Neural Networks and Learning Systems, Vol. 26, No. 10, pp. 2408-2421, October 2015.
- T. Greenberg-Toledo, B. Perach, I. Hubara, D. Soudry, and S. Kvatinsky, “Training of Quantized Deep Neural Networks using a Magnetic Tunnel Junction-Based Synapse,” Semiconductor Science and Technology, (in press).
- E. Rosenthal, S. Greshnikov, D. Soudry, and S. Kvatinsky, “A Fully Analog Memristor-Based Multilayer Neural Network with Online Backpropagation Training,” Proceeding of the IEEE International Symposium on Circuits and Systems, pp. 1394-1397, May 2016.